The changing virtual landscape

27 November, 2009

For the last ten years, virtual platforms have been heralded as a solution to deal with the ever growing software content issue related to chip design. Today, the effort to develop the hardware is often surpassed by the effort to develop the associated software. Software development has moved front and centre on the critical path for chip development.

As today's chips cannot go into volume production without software, it is now the timeliness of software availability that determines project success and profitability.

Virtual platforms are fully functional software simulations of the embedded hardware under development that execute the same software image loaded later onto the hardware. They successfully address the two key factors that impact the timing of software availability: the time when software development starts and how productive the software is, enabling users to achieve significant time to market gains as illustrated in Figure 1.

With virtual platforms, software development starts early enough to be truly parallel to hardware development. Virtual platforms also allow predictable reproduction of error cases and probing of conditions, which would be impossible to gather in the actual silicon prototype.

As always in high tech markets, early solutions for virtual platforms were proprietary and specifically targeted to address the immediate issue at hand, which allowed them to take some short-cuts such as creating models that are not interoperable between different simulators.

The virtual platform market

All of the virtual platform technology that exists today initially became available between 1997 and 1999. At the time, peripheral models were modelled functionally and registered accurate as high level functions in C. Processor models shifted from traditional interpreted ISSs to so called “just in time natively compiled” technologies. ISSs could now run well beyond 100 MIPS by themselves. To keep up the speed of the ISSs, direct back door access to the memory was made available, essentially allowing processors to by-pass complex bus-architectures simulation and fetch data and instructions.

More or less, all vendors of virtual platforms implemented these technologies, but in the absence of standards they used proprietary programming interfaces. As a result, the virtual platform market found itself in 2008 divided between the five main vendors: VaST, Virtutech, Virtio (now Synopsys), AXYS (now ARM) and CoWare. These vendors were ­separated by application domains, with Synopsys as the strongest in wireless handsets, VaST in automotive and Virtutech in compute/networking.

Vendor choices were determined by simulation speed and the availability of models, which lead to the separation in application domains.

In parallel, the Open SystemC Initiative (OSCI) was formed in 1999. While it has tried to address the needs of embedded software developers all along, OSCI initially failed to provide appropriate mechanisms for fast virtual platforms. When inserting inherently fast ISS models into SystemC, the nature of its programming interfaces slowed down simulation dramatically. It was not until 2007 that the key technologies to make virtual platforms fast - temporal decoupling, quantum based simulation and direct memory interfaces - were donated to OSCI's TLM working group. Since the ratification of the SystemC TLM-2.0 API standard in June 2008, the new infrastructure for virtual platform assembly has been endorsed widely by vendors and users. Virtual platforms using the new TLM-2.0 APIs are no longer significantly slower. They have proven to run at about 90% of the speed they would reach using proprietary solutions.

This dynamic has a profound impact on the overall market of virtual platforms. Previously, users investing in models were locked into a specific proprietary simulation solution. This is no longer the case. The investment in models is now safe and allows re-use across all simulation solutions, even in the OSCI reference simulator. As a result, the vendor product offerings are now undergoing a separation into interoperable libraries, development environments and simulators.

As result of the SystemC standardisation, the virtual platform market can now expect a transition from its proprietary early adopter state to mainstream adoption enabled by interoperability.

It marks a clear win for users as their investment in virtual platform models is now safe and re-usable. Moving forward, vendors will face a new dynamic in which models run in all SystemC compliant simulators, and their focus will shift to productivity enhancements in the areas of debug, profiling and analysis.